Bank-level fault management in a memory system

摘要

According to one aspect, bank-level fault management in a memory system is provided. The memory system includes a plurality of ranks, each rank including a plurality of memory devices each having a plurality of banks. A first error is detected in a first bank number of a first memory device of a rank. The first bank number of the first memory device is marked with a bank-level chip mark. The bank-level chip mark isolates declaration of an error condition to the first bank number. A bank-level fault management action is performed based on the bank-level chip mark to accommodate the error condition.

主权项

1. A memory system, comprising:
a plurality of ranks, each rank comprising a plurality of memory devices each having a plurality of banks; and a memory buffer device coupled to at least one of the ranks, the memory system configured to:
detect a first error in a first bank number of a first memory device of a rank;mark the first bank number of the first memory device with a bank-level chip mark, the bank-level chip mark isolating declaration of an error condition to the first bank number;detect a second error in the first bank number of a second memory device of the rank;based on a determination that a non-faulty bank is available at a second bank number, overwrite in-use data storage of the second bank number with data associated with the first bank number of the second memory device and steer access requests for the first bank number of the second memory device to the non-faulty bank having the second bank number; andperform a bank-level fault management action based on the bank-level chip mark to accommodate the error condition by accessing the second bank number to accommodate the second error and correcting the first error using an error-correcting code decoder in combination with accessing the first bank number and the second bank number.