发明名称 |
Semiconductor memory device, method of performing a refresh for semiconductor memory device and refresh counter in semiconductor memory device |
摘要 |
A semiconductor memory device may include a memory cell array, a first decoder and a second decoder. The memory cell array includes a plurality of memory cell rows. The first decoder is configured to select a first number of memory cell rows of the plurality of memory cell rows based on a selected refresh row address of a set of row addresses. The second decoder is configured to select a second number of memory cell rows of the plurality of memory cell rows based on the selected refresh row address. A total number of the first number and the second number is varied in response to the selected refresh row address. |
申请公布号 |
US9601179(B2) |
申请公布日期 |
2017.03.21 |
申请号 |
US201514723261 |
申请日期 |
2015.05.27 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
Byun Young-Yong;Bae Whi-Young |
分类号 |
G11C7/00;G11C11/406;G11C8/10;G11C11/408;G11C8/04 |
主分类号 |
G11C7/00 |
代理机构 |
Muir Patent Law, PLLC |
代理人 |
Muir Patent Law, PLLC |
主权项 |
1. A semiconductor memory device, comprising:
a memory cell array comprising a plurality of memory cell rows; a first decoder configured to perform a refresh on a first number of memory cell rows of the plurality of memory cell rows based on a selected refresh row address of a set of refresh row addresses; and a second decoder configured to perform a refresh on a second number of memory cell rows of the plurality of memory cell rows based on the selected refresh row address, wherein a total number of the first number of rows and the second number of rows is varied in response to the selected refresh row address. |
地址 |
Samsung-ro, Yeongtong-gu, Suwon-si KR |