发明名称 Sigma-delta analog-to-digital converter
摘要 The present invention is related to a sigma-delta analog-to-digital converter (ADC). It further relates to a method for designing and manufacturing a sigma-delta ADC, and to a digital control loop comprising the same. According to the present invention, part of the filtering function required for noise-shaping is implemented in the feedback path. By suitably distributing the poles over the forward and feedback paths, stable operation can be achieved while offering low latency.
申请公布号 US9602126(B2) 申请公布日期 2017.03.21
申请号 US201214654432 申请日期 2012.12.21
申请人 TELEDYNE DALSA B.V. 发明人 Schinkel Daniel;Groothedde Wouter
分类号 H03F3/45;H03M3/00;H03F3/181 主分类号 H03F3/45
代理机构 K&L Gates LLP 代理人 K&L Gates LLP
主权项 1. A sigma-delta analog-to-digital converter (ADC), comprising: a first forward path connected to an input of the sigma-delta ADC comprising a filtering stage and a quantization stage, the first forward path having a transfer function Hff; a first feedback path from an output of the first forward path to the input of the sigma-delta ADC, said first feedback path comprising a digital-to-analog converter (DAC) and a digital filter for converting the output of the first forward path, said first feedback path having a transfer function Hfb; wherein the sigma-delta ADC has a stable noise transfer function NTF given by:NTF=11+Hff⁢Hfb=11+Hwherein H is the loop transfer function, said NTF having at least one damped zero; wherein, if H comprises undamped poles, Hff comprising all the undamped poles of H, and wherein Hfb comprises at least one damped pole associated with one of said at least one damped zero; wherein the first feedback path comprises a finite impulse response (FIR) digital filter that has an impulse response that approximates the impulse response associated with Hfb, wherein the first N coefficients of the impulse response are implemented as said FIR filter, wherein N is at least equal to the time constant of the most low frequent pole of Hfb; wherein the FIR digital filter is combined with the DAC for forming a finite impulse response digital-to-analog converter FIRDAC.
地址 Eindhoven NL