High voltage double-diffused MOS (DMOS) device and method of manufacture

摘要

A method of forming an integrated DMOS transistor/EEPROM cell includes forming a first mask over a substrate, forming a drift implant in the substrate using the first mask to align the drift implant, simultaneously forming a first floating gate over the drift implant, and a second floating gate spaced apart from the drift implant, forming a second mask covering the second floating gate and covering a portion of the first floating gate, forming a base implant in the substrate using an edge of the first floating gate to self-align the base implant region, and simultaneously forming a first control gate over the first floating gate and a second control gate over the second floating gate. The first floating gate, first control gate, drift implant, and base implant form components of the DMOS transistor, and the second floating gate and second control gate form components of the EEPROM cell.

主权项

1. A method of simultaneously forming a double diffused metal oxide semiconductor (DMOS) transistor and an electrically erasable programmable read-only memory (EEPROM) cell, comprising:
forming a first mask over a substrate; forming a drift implant region in the substrate using the first mask to align the drift implant region; simultaneously forming a first floating gate over the drift implant region in the substrate, and a second floating gate over the substrate at a location spaced apart from the drift implant region; forming a second mask covering the second floating gate and covering a portion of the first floating gate; forming a base implant region in the substrate using an edge of the first floating gate to self-align the base implant region; and simultaneously forming a first control gate over the first floating gate and a second control gate over the second floating gate; wherein the first floating gate, first control gate, drift implant region, and base implant region form components of the DMOS transistor, and wherein the second floating gate and second control gate form components of the EEPROM cell.