STRAINED STACKED NANOWIRE FIELD-EFFECT TRANSISTORS (FETs)

摘要

A method for manufacturing a semiconductor device comprises epitaxially growing a plurality of silicon layers and compressively strained silicon germanium (SiGe) layers on a substrate in a stacked configuration, wherein the silicon layers and compressively strained SiGe layers are alternately stacked on each other starting with a silicon layer on a bottom of the stacked configuration, patterning the stacked configuration to a first width, selectively removing a portion of each of the silicon layers in the stacked configuration to reduce the silicon layers to a second width less than the first width, forming an oxide layer on the compressively strained SiGe layers of the stacked configuration, wherein forming the oxide layer comprises fully oxidizing the silicon layers so that portions of the oxide layer are formed in place of each fully oxidized silicon layer, and removing part of the oxide layer while maintaining at least part of the portions of the oxide layer formed in place of each fully oxidized silicon layer, wherein the compressively strained SiGe layers are anchored to one another and a compressive strain is maintained in each of the compressively strained SiGe layers.

主权项

1. A method for manufacturing a semiconductor device, comprising:
epitaxially growing a plurality of silicon layers and a plurality of compressively strained silicon germanium (SiGe) layers on a substrate in a stacked configuration, wherein the plurality of silicon layers and the plurality of compressively strained SiGe layers are alternately stacked on each other starting with a silicon layer on a bottom of the stacked configuration, and wherein the plurality of compressively strained SiGe layers form channel regions of the semiconductor device; patterning the stacked configuration to a first width; selectively removing a portion of each of the plurality of silicon layers in the stacked configuration to reduce each of the plurality of silicon layers to a second width less than the first width; performing a condensation process after the selective removal of the portion of each of the plurality of silicon layers from the stacked configuration, wherein the plurality of silicon layers reduced by the selective removal are fully oxidized during the condensation process, and the condensation process results in an oxide layer on the substrate and on remaining portions of the stacked configuration, the oxide layer including fully oxidized silicon portions formed in place of each silicon layer, wherein a compressive strain in each of the plurality of compressively strained SiGe layers is maintained by the plurality of silicon layers and then by the fully oxidized silicon portions contacting the plurality of compressively strained SiGe layers; and removing part of the oxide layer, wherein remaining portions of the oxide layer are in the stacked configuration and have a smaller width than a width of the plurality of compressively strained SiGe layers, the remaining portions of the oxide layer maintaining the compressive strain in each of the plurality of compressively strained SiGe layers.