MEMORY CONTROLLER, SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE

摘要

According to one embodiment, a memory controller controlling write to and read from a 3D NAND flash memory including a plurality of blocks, one block being constituted by a plurality of pages stacked in a depth direction includes a frame generator that generates frame data including an error detecting code or an error correcting code, and a frame divider that divides the frame data to generate a plurality of divided frames including a first divided frame and a second divided frame. The first divided frame and the second divided frame are written into different pages from one another.

主权项

1. A memory controller controlling write to and read from a 3D NAND flash memory including a plurality of blocks, one block being constituted by a plurality of pages stacked in a depth direction, the memory controller comprising:
a frame generator that generates frame data including an error detecting code or an error correcting code; and a frame divider that divides the frame data to generate a plurality of divided frames including a first divided frame and a second divided frame, wherein the first divided frame and the second divided frame are written into different pages from one another.