| 发明名称 |
SiGe CMOS WITH TENSELY STRAINED NFET AND COMPRESSIVELY STRAINED PFET |
| 摘要 |
A method includes providing a Si substrate having an overlying layer of Si1-xGex; growing, over the layer of Si1-xGe, a layer of Si in an NFET region and a second layer of Si1-xGex in a PFET region; partitioning the layer of Si1-xGex into a structure including a first Si1-xGex sub-layer disposed in the NFET region and a second Si1-xGex sub-layer disposed in the PFET region; annealing the structure to convert the first Si1-xGex sub-layer and the overlying Si layer into a tensily strained Si1-xGex intermixed layer and to convert the second Si1-xGex sub-layer and the overlying second layer of Si1-xGex into a compressively strained Si1-xGex intermixed layer, where a value of x in the tensily strained Si1-xGex intermixed layer is less than a value of x in the compressively strained Si1-xGex intermixed layer and forming a first transistor in the NFET region and a second transistor in the PFET region. |
| 申请公布号 |
US2017077231(A1) |
申请公布日期 |
2017.03.16 |
| 申请号 |
US201514849683 |
申请日期 |
2015.09.10 |
| 申请人 |
International Business Machines Corporation |
发明人 |
BALAKRISHNAN Karthik;Cheng Kangguo;Hashemi Pouya;Reznicek Alexander |
| 分类号 |
H01L29/10;H01L29/78;H01L21/8238;H01L27/12 |
主分类号 |
H01L29/10 |
| 代理机构 |
|
代理人 |
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| 主权项 |
1. A method, comprising:
providing a Si substrate having an overlying first layer of Si1-xGex; growing, over the first layer of Si1-xGex, a layer of Si in what will be an NFET region and a second layer of Si1-xGex in what will be a PFET region, where the second layer of Si1-xGex is grown directly upon a top surface of the first layer of Si1-xGex; partitioning the first layer of Si1-xGex into a structure comprised of a first Si1-xGex sub-layer disposed in the NFET region and into a second Si1-xGex sub-layer disposed in the PFET region; annealing the structure to convert the first Si1-xGex sub-layer and the overlying Si layer into a tensily strained Si1-xGex intermixed layer and to convert the second Si1-xGex sub-layer and the overlying second layer of Si1-xGex into a compressively strained Si1-xGex intermixed layer, where a value of x in the tensily strained Si1-xGex intermixed layer, due to dilution of the first Si1-xGex sub-layer by the overlying Si layer, is less than a value of x in the compressively strained intermixed layer; and forming a first transistor device in the NFET region and a second transistor device in the PFET region. |
| 地址 |
Armonk NY US |
