发明名称 Selective partitioning of via structures in printed circuit boards
摘要 The embodiments herein relates to a method for selective partitioning of a via in a printed circuit board (200) as to produce an electrically isolating portion between two electrically conducting portions in said via. The method involves the step of prior to drilling the hole for the via (240), laminating plating resist layers (233,234) to the printed circuit board (200) at a distance from each other corresponding to the desired length of the electrically isolated portion of the via. After drilling, copper is added to selected portions of the interior of the via (240) in two different processing steps followed by a step of removing undesired copper as to produce the electrically isolating portion.
申请公布号 AU2014275589(B2) 申请公布日期 2017.03.16
申请号 AU20140275589 申请日期 2014.05.20
申请人 Telefonaktiebolaget L M Ericsson (publ) 发明人 Kallman, Stig;Bergsten, Tomas
分类号 H05K3/42 主分类号 H05K3/42
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