发明名称 |
CONTINUOUS TIME LINEAR EQUALIZATION FOR CURRENT-MODE LOGIC WITH TRANSFORMER |
摘要 |
The present invention is directed to data communication systems and methods. More specifically, embodiments of the present invention provide a CML that uses one or more equalization modules to apply equalization via secondary windings of transformers that are coupled, directly or indirectly, to the CML outputs. The equalization modules comprises a DAC component that generates switching signals based on control signals received from an external equalization module. The equalization module also includes switchable resistors and/or capacitors. The switching signals are used to select switchable resistors and/or capacitors. By switching resistors and/or capacitors at the equalization module, the outputs of the CML are equalized. There are other embodiments as well. |
申请公布号 |
US2017078120(A1) |
申请公布日期 |
2017.03.16 |
申请号 |
US201615359338 |
申请日期 |
2016.11.22 |
申请人 |
INPHI CORPORATION |
发明人 |
MISHRA Parmanand;NIELSEN Steffen;HARWOOD Michael S. |
分类号 |
H04L25/03;H04L25/02 |
主分类号 |
H04L25/03 |
代理机构 |
|
代理人 |
|
主权项 |
1. A communication system comprising:
a pair of differential input terminals, the pair of differential input terminals comprising a first input and a second input for receiving data; a current mode logic device comprising:
a first transistor comprising a first gate and a first output terminal and a first source terminal, the first gate being electrically coupled to the first input;a second transistor comprising a second gate and a second output terminal, the second gate being electrically coupled to the second input;a capacitor module coupled to the first source terminal;a first resistor coupled to the first output terminal;a second resistor coupled to the second output terminal;a first transformer comprising a first primary winding and a first secondary winding, the first primary winding being electrically coupled to the first resistor and the first output terminal; anda first equalization module coupled to the first secondary winding, the first equalization module comprising a first digital-to-analog converter (DAC) unit, the DAC unit being configure to adjust an impedance value of the first equalization module in response to an equalization signal; and a SerDes device being coupled to the first output terminal. |
地址 |
Santa Clara CA US |