| 发明名称 |
SENSE AMPLIFIER CIRCUITS AND METHODS OF OPERATION |
| 摘要 |
A sense amplifier circuit includes a power node having a power node voltage at a power voltage level, a bit line having a bit line voltage, a sense amplifier output, an NMOS transistor and a PMOS transistor coupled in series between the power node and the bit line, and a logic gate configured to generate a sense amplifier output voltage at the sense amplifier output based on the bit line voltage. The NMOS transistor is configured to operate in a sub-threshold region to maintain the bit line voltage at a first level and operate in a region above the sub-threshold region to maintain the bit line voltage at a second level, and the first level is between the second level and the power voltage level. |
| 申请公布号 |
US2017076786(A1) |
申请公布日期 |
2017.03.16 |
| 申请号 |
US201615341151 |
申请日期 |
2016.11.02 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
UPPUTURI Bharath |
| 分类号 |
G11C11/419;G11C11/418 |
主分类号 |
G11C11/419 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A sense amplifier circuit comprising:
a power node having a power node voltage at a power voltage level; a bit line having a bit line voltage; a sense amplifier output; an NMOS transistor and a PMOS transistor coupled in series between the power node and the bit line; and a logic gate configured to generate a sense amplifier output voltage at the sense amplifier output based on the bit line voltage, wherein the NMOS transistor is configured to operate in a sub-threshold region to maintain the bit line voltage at a first level and operate in a region above the sub-threshold region to maintain the bit line voltage at a second level, and the first level is between the second level and the power voltage level. |
| 地址 |
Hsinchu TW |
