| 摘要 |
A semiconductor device according to an embodiment includes a SiC layer having a first plane and a second plane, a first SiC region of a first conductivity type which is provided in the SiC layer, first and second pillar regions of a second conductivity type, third and fourth pillar regions of a second conductivity type which are provided between the first and second pillar regions and the first plane, a gate electrode provided between the third pillar region and the fourth pillar region, first and second body regions of the second conductivity type, a gate insulating film, fifth and sixth pillar regions provided between the third and fourth pillar regions and the gate electrode, first and second source regions of the first conductivity type. |
| 主权项 |
1. A semiconductor device comprising:
a SiC layer having a first plane and a second plane; a first SiC region of a first conductivity type provided in the SiC layer; a first pillar region of a second conductivity type provided in the first SiC region; a second pillar region of the second conductivity type provided in the first SiC region; a third pillar region of the second conductivity type provided between the first pillar region and the first plane, the third pillar region having a higher second-conductivity-type impurity concentration than the first pillar region; a fourth pillar region of the second conductivity type provided between the second pillar region and the first plane, the fourth pillar region having a higher second-conductivity-type impurity concentration than the second pillar region; a gate electrode having at least a portion provided between the third pillar region and the fourth pillar region; a first body region of the second conductivity type provided between the first SiC region and the first plane, the first body region having a lower second-conductivity-type impurity concentration than the third pillar region; a second body region of the second conductivity type provided between the first SiC region and the first plane, the second body region having a lower second-conductivity-type impurity concentration than the fourth pillar region; a gate insulating film provided between the first body region and the gate electrode and between the second body region and the gate electrode, a distance between the first plane and an end of the gate insulating film close to the second plane being less than distances between the first plane and ends of the third pillar region and the fourth pillar region close to the second plane; a fifth pillar region of the second conductivity type provided between the third pillar region and the gate electrode, the fifth pillar region being in contact with the third pillar region, the fifth pillar region facing the gate electrode with the first SiC region interposed therebetween, and the fifth pillar region having a lower second-conductivity-type impurity concentration than the third pillar region; a sixth pillar region of the second conductivity type provided between the fourth pillar region and the gate electrode, the sixth pillar region being in contact with the fourth pillar region, the sixth pillar region facing the gate electrode with the first SiC region interposed therebetween, and the sixth pillar region having a lower second-conductivity-type impurity concentration than the fourth pillar region; a first source region of the first conductivity type provided between the first body region and the first plane; and a second source region of the first conductivity type provided between the second body region and the first plane. |
