发明名称 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
摘要 Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.
申请公布号 US2017077201(A1) 申请公布日期 2017.03.16
申请号 US201515122172 申请日期 2015.09.25
申请人 BOE Technology Group Co., Ltd. 发明人 Chen Jiangbo;Cheng Jun;Jiang Chunsheng;Liu Xiaodi;Kong Xiangyong
分类号 H01L27/32;H01L51/56 主分类号 H01L27/32
代理机构 代理人
主权项 1. A method of manufacturing an array substrate, the array substrate comprising a first region corresponding to a via-hole of a switching transistor, a second region corresponding to a via-hole of a driving transistor, and a third region except the first region and the second region, the method comprising steps of: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.
地址 Beijing CN