| 摘要 |
Apparatus and method used to verify that an integrated circuit hardware design 202, for example a system-on-chip which may contain a D-type flip-flop 102, meets a power requirement 204. The power requirement 204 may be that the number of power-consuming transitions, or the related power consumption, is less than a predetermined value or less than that of another hardware design or chip. The claimed method includes: detecting whether a power consuming transition has occurred for one or more flip-flops 102 of the IC; updating a count of power consuming transitions; and determining whether the power requirement 204 is met at a particular time by evaluating properties that are based on the count of power consuming transitions. Apparatus is claimed comprising: transition detection logic units, used to detect the power consuming transitions; counter update logic units, such as hardware monitor 208, to count the number of transitions; and a property verification logic unit, which may be a formal verification tool 212, to determine whether the power requirement 204 is met based on the number of transitions. A scenario 206 may define, a formal verification language, circumstances under which the power requirement 204 is met. |
