发明名称 ワイドバンドギャップ半導体装置およびその製造方法
摘要 PROBLEM TO BE SOLVED: To provide a technique for materialization of a wide band gap semiconductor device which has a reduced channel resistance and is improved in the instability of a threshold voltage.SOLUTION: The method comprises: introducing an n-type impurity into a p-type well region 5 of a SiC power MOSFET to form a channel neutral layer 7 for a channel. The average value of the concentration of the n-type impurity in a region ranging from the interface of a gate insulative film 8 and the channel neutral layer 7 up to 200 nm in a direction of the depth is twice or smaller than the average value of the concentration of a p-type impurity in the same region.
申请公布号 JP6095902(B2) 申请公布日期 2017.03.15
申请号 JP20120128227 申请日期 2012.06.05
申请人 株式会社日立製作所 发明人 毛利 友紀;手賀 直樹;松元 大輔;秋山 悟
分类号 H01L29/78;H01L29/12 主分类号 H01L29/78
代理机构 代理人
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