发明名称 多入力積分回路
摘要 PROBLEM TO BE SOLVED: To increase the number of input signals while suppressing the increase of a circuit area and cost.SOLUTION: A multi-input integration circuit includes: an operational amplifier A; mode changeover switches SM11, SM12, SM21 and SM31; signal changeover switches SS11 to SS14 and SS21 to SS24; charging switches SC1 and SC2; discharge switches SD11, SD12, SD21 and SD22; input capacitors C1 and C2; integration capacitors Cf1 to Cf4; and a control circuit 3 for controlling each switch. When the number of input signals is set to be 4, the input capacitors C1 and C2 are alternately used with the input capacitance set to be 1/2. Simultaneously, the integration capacitors Cf1 to Cf4 are used in sequence, with the capacitance of integration capacitors set to be 1/2.
申请公布号 JP6097211(B2) 申请公布日期 2017.03.15
申请号 JP20130266680 申请日期 2013.12.25
申请人 アズビル株式会社 发明人 梶田 徹矢;加藤 太一郎
分类号 H03H19/00;H03K5/08 主分类号 H03H19/00
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