发明名称 SEMICONDUCTOR FAULT ANALYSIS DEVICE AND FAULT ANALYSIS METHOD
摘要 A failure analysis apparatus 1A is provided with a voltage applying unit 14 for applying a bias voltage to a semiconductor device S, an imaging device 18 for acquiring an image, and an image processing unit 30 for performing image processing, and the imaging device 18 acquires a plurality of analysis images each including a thermal image in a voltage applied state and a plurality of background images in a voltage non-applied state. The image processing unit 30 includes an imaging position calculating section 32 for calculating an imaging position of each of the analysis images and the background images, an image classifying section 33 for classifying the analysis images and the background images into N image groups based on a region division unit prepared for the imaging position, and a difference image generating section 34 for generating difference images between the analysis images and the background images individually for N image groups. Accordingly, a semiconductor failure analysis apparatus and method capable of suppressing the effect of a shift in imaging position in a thermal analysis image of a semiconductor device can be realized.
申请公布号 EP2565914(A4) 申请公布日期 2017.03.08
申请号 EP20110774687 申请日期 2011.02.21
申请人 Hamamatsu Photonics K.K. 发明人 TAKESHIMA Tomochika
分类号 H01L21/66;G01N25/72;G06T1/00 主分类号 H01L21/66
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