发明名称 制御装置,ストレージ装置,及び制御プログラム
摘要 A control device including a processor. The processor configured to allocate a data area of a memory device to a plurality of memory areas of data blocks of a first size; allocate identical data blocks of the first size to a plurality of the data areas of the memory device; manage management information indicating a data storing state of the plurality of memory areas of data blocks of the first size in each data area; determine, based on the management information regarding a plurality of data areas allocated with respect to a data block to be written, one data area from the plurality of data areas; and generate write data of a second size, which is different from the first size, including data of the data block to be written and write the write data in the one data area.
申请公布号 JP6089844(B2) 申请公布日期 2017.03.08
申请号 JP20130059325 申请日期 2013.03.22
申请人 富士通株式会社 发明人 小林 秀史;紺田 與志仁;猪頭 惇;仁村 康太郎;安部 麻理恵;東條 美帆子;中村 政智
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
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