| 主权项 |
1. A method, comprising:
a computer system receiving, by a single integrated service, a user specified high level design selecting a plurality of IP cores for placement in a customized system on chip; the computer system automatically performing, by the single integrated service, each of a design integration phase, specification phase, and verification phase for the user specified high level design to generate an integration file specifying stitching between a plurality of pins of each of the plurality of IP cores, a specification file specifying one or more characteristics of the customized system on a chip based on the user specified high level design, and a verification testbench for verification of the plurality of IP cores selected in the user specified high level design; the computer system generating the specification file by accessing a core wrappers database identifying specifications of one or more gates, one or more registers, and one or more I/O interfaces for each of the plurality of IP cores; the computer system calculating a combinational gates count by summing the one or more gates for each of the plurality of IP cores; the computer system calculating a registers count by summing the one or more registers for each of the plurality of IP cores; the computer system calculating an I/O count by summing the one or more I/O interfaces for each of the plurality of IP cores; the computer system determining each of a frequency factor, a voltage factor, and a switch factor based on the combinational gates count, the registers count, the I/O count, and at least one power limit for the customized system on chip; the computer system computing, based on the frequency factor, voltage factor, and switch factor, an estimated dynamic power for the customized system on chip and an estimated leakage power for the customized system on chip, a total power estimated from a sum of the estimated dynamic power and the estimated leakage power; and the computer system outputting a power spreadsheet specifying each of the frequency factor, the voltage factor, the switch factor, the estimated dynamic power, the estimated leakage power, and the total power as the one or more characteristics of the customized system on chip for the specification file. |
