System and method for higher quality log likelihood ratios in LDPC decoding

摘要

A nonvolatile memory storage controller is provided for delivering log likelihood ratios (LLRs) to a low-density parity check (LDPC) decoder for use in the decoding of an LDPC encoded codeword. The controller includes read circuitry for reading an LDPC encoded codeword stored in a nonvolatile memory storage module using a plurality of soft-decision reference voltages to provide a plurality of soft-decision bits representative of the codeword. The controller further includes a plurality of neighboring cell contribution LLR look-up tables representative of the contribution of the neighboring cells to threshold voltage distribution of the memory storage module. The controller provides the LLRs from the appropriate LLR look-up table to an LDPC decoder for the subsequent decoding of the codeword.

主权项

1. A method of providing one or more log likelihood ratio (LLRs) of a target cell to a low-density parity check (LDPC) decoder, the method comprising:
storing a neighboring cell contribution LLR look-up table associated with the nonvolatile memory storage module, the neighboring cell contribution LLR look-up table including combinations of possible read patterns for the target cell and the neighboring cells, and associated LLR's, each of the LLR's corresponding to a bit error rate for the associated possible read pattern; reading a threshold voltage of a target cell stored in a nonvolatile memory storage module; reading a threshold voltage of one or more neighboring cells of the target cell stored in the nonvolatile memory storage module; accessing the neighboring cell contribution LLR look-up table associated with the nonvolatile memory storage module; extracting from the neighboring cell contribution LLR look-up table the LLR corresponding to the pattern of the read of the threshold voltage of the target cell and the read of the threshold voltage of the one or more neighboring cells; and providing the extracted LLR to an LDPC decoder.