Array substrate, display device and method for fabricating array substrate

摘要

The invention provides an array substrate, a method therefor and a display device. The array substrate includes: a substrate, and a thin film transistor (TFT) and a pull-down capacitor disposed on the substrate. The TFT includes: a gate, a gate insulating layer, a channel layer, a source, a drain and a passivation layer. The passivation layer is disposed with a via hole corresponding to the drain, a pixel electrode is connected to the drain through the via hole. The pull-down capacitor includes: a first conductive layer, a first spacer layer, a filling layer, a second spacer layer and a second conductive layer successively stacked on the substrate. The sum of thicknesses of the filling layer and the first spacer layer is greater than the sum of thicknesses of the drain and the channel layer, to make the second conductive layer and the pixel electrode be located at different levels.

主权项

1. An array substrate comprising:
a substrate, and a thin film transistor and a pull-down capacitor disposed on a same surface of the substrate, the pull-down capacitor being disposed neighboring with the thin film transistor; the thin film transistor comprising:
a gate, a gate insulating layer and a channel layer successively stacked on the surface of the substrate;a source and a drain, the source and the drain being disposed on the channel layer, the source and the drain being disposed spaced from each other; anda passivation layer stacked on the source, the drain and the channel layer, the passivation layer being disposed with a via hole, the via hole being disposed corresponding to the drain, a pixel electrode being connected to the drain through the via hole; the pull-down capacitor comprising:
a first conductive layer, a first spacer layer, a filling layer, a second spacer layer and a second conductive layer successively stacked on the surface of the substrate; a sum of a thickness of the filling layer and a thickness of the first spacer layer is greater than a sum of thicknesses of the drain and the channel layer, so as to make the second conducive layer and the pixel electrode to be located at different planes, wherein the sum of the thickness of the filling layer and the thickness of the first spacer layer is greater by 0.3 μm-0.6 μm than the sum of the thicknesses of the drain and the channel layer.