发明名称 |
Asymmetric pass field-effect transistor for non-volatile memory |
摘要 |
A method of performing an operation on a non-volatile memory (NVM) cell of a memory device is disclosed. The pass transistor of the NVM cell is an asymmetric transistor including a source with a halo implant. The source of the pass transistor is coupled to a common source line (CSL) that is shared among NVM cells of a sector of NVM cells. The operation may be performed by applying a first signal to a word line (WLS) coupled to a gate of a memory transistor of the NVM cell and applying a second signal to a bit line (BL) coupled to a drain of the memory transistor of the NVM cell. |
申请公布号 |
US9589652(B1) |
申请公布日期 |
2017.03.07 |
申请号 |
US201615078890 |
申请日期 |
2016.03.23 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
Lee Sungkwon;Prabhakar Venkatraman |
分类号 |
G11C16/04;G11C16/14;G11C16/26;H01L27/115 |
主分类号 |
G11C16/04 |
代理机构 |
Lowenstein Sandler LLP |
代理人 |
Lowenstein Sandler LLP |
主权项 |
1. A method comprising:
performing an operation on a non-volatile memory (NVM) cell of a memory device, wherein a pass transistor of the NVM cell is an asymmetric transistor comprising a source with a halo implant, wherein the source of the pass transistor is coupled to a common source line (CSL) that is shared among NVM cells of a sector of NVM cells, and wherein the operation comprises:
applying a first signal to a word line (WLS) coupled to a gate of a memory transistor of the NVM cell; andapplying a second signal to a bit line (BL) coupled to a drain of the memory transistor of the NVM cell. |
地址 |
San Jose CA US |