发明名称 Power conversion device
摘要 An uneven return current is prevented and increase in a loss is suppressed in a power conversion apparatus at the time of inverter operation. The invention includes first and second transistor switch groups in each of which arms are connected in parallel, and sense resistors for detecting a drain current are connected to the first and second transistor switch groups, and a first drive circuit group and the second drive circuit group include means for monitoring a sense current flowing through the sense resistors and a plurality of delay circuits. Further, rising of the plurality of transistor switch groups is controlled by controlling activation and non-activation of the plurality of delay circuits on the basis of a magnitude of the sense current.
申请公布号 US9590529(B2) 申请公布日期 2017.03.07
申请号 US201214422371 申请日期 2012.09.28
申请人 Hitachi, Ltd. 发明人 Akiyama Satoru
分类号 H02H7/122;H02M7/537;H02M1/088;H02M3/156;H02M7/5387;H01L25/00;H03K17/082;H03K17/16;H01L23/495;H02M1/00;H01L23/00 主分类号 H02H7/122
代理机构 Miles & Stockbridge P.C. 代理人 Miles & Stockbridge P.C.
主权项 1. A power conversion apparatus, comprising: a plurality of first transistor switch groups inserted between a first power supply voltage and an output node; a second transistor switch group inserted between a second power supply voltage higher than the first power supply voltage and the output node; a first drive circuit group for controlling on/off of the first transistor switch groups; and a second drive circuit group for controlling on/off of the second transistor switch group, wherein sense resistors for detecting a drain current are connected to the plurality of first transistor switch groups and the second transistor switch group; the first drive circuit group and the second drive circuit group each include respective sense nodes for monitoring respective sense currents flowing through the sense resistors and a plurality of delay circuits; and the power conversion apparatus further comprises a delay control circuit configured to control activation and non-activation of the plurality of the delay circuits on the basis of a magnitude of the sense current, such that a return current is equally divided among said plurality of first transistor switch groups and second transistor switch group.
地址 Tokyo JP