发明名称 |
Glitch filter circuit and method |
摘要 |
A glitch filter circuit has a filter/delay part that always operates on rising or falling pulses for both rising edges and falling edges of the input signal. In this way, the filter delay can be made symmetrical and the circuit will have no duty cycle distortion. The rise and fall delays will track each other when there are PVT (Process, Voltage and Temperature) variations. |
申请公布号 |
US9590605(B2) |
申请公布日期 |
2017.03.07 |
申请号 |
US201213687896 |
申请日期 |
2012.11.28 |
申请人 |
NXP B.V. |
发明人 |
Gopal Kiran |
分类号 |
H03K5/14;H03K5/1252;H03K19/003 |
主分类号 |
H03K5/14 |
代理机构 |
|
代理人 |
|
主权项 |
1. A glitch filter circuit comprising:
an input circuit having a first input and a second input, wherein the input circuit is configured to detect both rising and falling signal level transitions of an input signal at the first input; an RC delay circuit at an output of the input circuit; an output circuit coupled to an output of the RC delay circuit, wherein the output circuit comprises a T-type flip flop and is configured to toggle an output of the glitch filter circuit between high and low levels in response to the RC delay circuit output; and a feedback path from the output circuit to the second input of the input circuit, wherein the input signal enters the glitch filter only at the first input. |
地址 |
Eindhoven NL |