发明名称 LTPS TFT substrate structure and method of forming the same
摘要 A method of forming an LTPS TFT substrate includes: Step 1: providing a substrate (1) and depositing a buffer layer (2); Step 2: depositing an a-Si layer (3); Step 3: depositing and patterning a silicon oxide layer (4); Step 4: taking the silicon oxide layer (4) as a photomask and annealing the a-Si layer (3) with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer; Step 5: forming a first poly-Si region (31) and a second poly-Si region (32); Step 6: defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions (31) and (32), and forming an LDD area; Step 7: depositing and patterning a gate insulating layer (5); Step 8: forming a first gate (61) and a second gate (62); Step 9: forming via holes (70); and Step 10: forming a first source/drain (81) and a second source/drain (82).
申请公布号 US9589985(B2) 申请公布日期 2017.03.07
申请号 US201514428982 申请日期 2015.02.09
申请人 Shenzhen China Star Optoelectronics Technology Co., Ltd 发明人 Lu Gaiping
分类号 H01L29/16;H01L27/12;H01L21/223;H01L21/283;H01L21/306;H01L21/31;H01L21/311;H01L21/3213;H01L21/324;H01L21/768;H01L23/522;H01L29/04;H01L29/08;H01L29/49;H01L29/66;H01L29/786 主分类号 H01L29/16
代理机构 代理人 Cheng Andrew C.
主权项 1. A LTPS TFT substrate, comprising: a substrate; a buffer layer on the substrate; a first poly-Si region and a second poly-Si region arrayed on the buffer layer with a space between the two regions; a first source/drain and a second source/drain disposed above the first poly-Si region and the second poly-Si region; a gate insulating layer installed on the buffer layer, the first poly-Si region and second poly-Si region; a first gate and a second gate installed on the gate insulating layer corresponding to the first poly-Si region and second poly-Si region; an interlayer dielectric layer installed on the gate insulating layer, the first gate and the second gate; wherein both sides of the first poly-Si region and the second poly-Si region are next to a heavily N-doped area, which connects to the first source/drain and the second source/drain through the via hole; a display area and a drive area, with the first poly-Si region in the display area of the LTPS TFT substrate, and the second poly-Si region in the drive area of the LTPS TFT substrate; grains of the first poly-Si region are smaller than those of the second poly-Si region, while a uniformity of the grains of the first poly-Si region is larger than that of the second poly-Si region.
地址 Shenzhen, Guangdong CN