THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES

摘要

Disclosed is a semiconductor memory device including stacks on a substrate, a vertical channel portion connected to the substrate through each of the stacks, and a separation pattern disposed between the stacks. Each of the stacks may include a plurality of gate electrodes stacked on the substrate and insulating patterns interposed between the gate electrodes. Each of the gate electrodes may include a first metal pattern, which is disposed between the insulating patterns to define a recess region recessed toward the vertical channel portion, and a second metal pattern disposed in the recess region. The first and second metal patterns may contain the same metallic material and may have mean grain sizes different from each other.

主权项

1. A semiconductor memory device, comprising:
stacks on a substrate, each of the stacks comprising a plurality of gate electrodes stacked on the substrate and insulating patterns interposed between the gate electrodes; a vertical channel connected to the substrate; and a separation pattern disposed between the stacks, wherein each of the gate electrodes comprises: a first metal pattern disposed between the insulating patterns to define a recess region recessed toward the vertical channel; and a second metal pattern disposed in the recess region, and wherein the first and second metal patterns contain the same metallic material and have mean grain sizes different from each other.