发明名称 VERTICAL MEMORY DEVICES
摘要 A vertical memory device includes a substrate, gate lines, channels, contacts and contact spacers. The gate lines are stacked on top of each other on the substrate. The gate lines are spaced apart from each other in a vertical direction with respect to a top surface of the substrate. The gate lines include step portions that extend in a parallel direction with respect to the top surface of the substrate. The channels extend through the gate lines in the vertical direction. The contacts are on the step portions of the gate lines. The contact spacers are selectively formed along sidewalls of a portion of the contacts.
申请公布号 US2017062473(A1) 申请公布日期 2017.03.02
申请号 US201615349625 申请日期 2016.11.11
申请人 LEE Byung-Jin;Kim Jee-Yong;Byeon Dae-Seok 发明人 LEE Byung-Jin;Kim Jee-Yong;Byeon Dae-Seok
分类号 H01L27/115 主分类号 H01L27/115
代理机构 代理人
主权项 1. A vertical memory device, comprising: a substrate; gate lines stacked on top of each other on the substrate, the gate lines being spaced apart from each other in a vertical direction with respect to a top surface of the substrate, the gate lines including step portions that extend in a parallel direction with respect to the top surface of the substrate, the gate lines including first gate lines and second gate lines, wherein the first gate lines are either on top of the second gate lines or the first gate lines are alternately stacked with the second gate lines; channels extending through the gate lines in the vertical direction; contacts on the step portions of the gate lines, the contacts including first contacts connected to the first gate lines and second contacts connected to the second gate lines; and contact spacers formed along sidewalls of a portion of the first contacts, the contact spacers not being formed along sidewalls of the second contacts.
地址 Seoul KR