发明名称 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
Performances of a semiconductor device are improved. The semiconductor device has: a gate electrode formed on an SOI layer of an SOI substrate via a gate insulating film having a charge storage film therein; an n-type semiconductor region and a p-type semiconductor region respectively formed on SOI layers on both sides of the gate electrode. A memory cell MC serving as a non-volatile memory cell is formed of the gate insulating film, the gate electrode, the n-type semiconductor region and the p-type semiconductor region. |
申请公布号 |
US2017062624(A1) |
申请公布日期 |
2017.03.02 |
申请号 |
US201615201493 |
申请日期 |
2016.07.03 |
申请人 |
Renesas Electronics Corporation |
发明人 |
MAKIYAMA Hideki |
分类号 |
H01L29/792;H01L27/115;H01L29/66;H01L29/78;H01L29/06 |
主分类号 |
H01L29/792 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a base body; an insulating layer formed on the base body; a semiconductor layer formed on the insulating layer; a gate insulating film having a charge storage portion formed therein, formed on the semiconductor layer; a gate electrode formed on the gate insulating film; a first semiconductor region of a first conductive type formed in the semiconductor layer in a portion located on a first side of the gate electrode when seen in a plan view; and a second semiconductor region of a second conductive type different from the first conductive type, formed in the semiconductor layer in a portion located on a side opposite to the first side of the gate electrode when seen in a plan view, wherein a non-volatile memory cell is formed of the gate insulating film, the gate electrode, the first semiconductor region and the second semiconductor region. |
地址 |
Tokyo JP |