| 发明名称 |
Deep Trench Isolation Structures and Methods of Forming Same |
| 摘要 |
An embodiment isolation structure includes a first passivation layer over a bottom surface and extending along sidewalls of a trench in a semiconductor substrate, wherein the first passivation layer includes a first dielectric material. The semiconductor device further includes a passivation oxide layer in the trench on the first passivation layer, wherein the passivation oxide layer includes an oxide of the first dielectric material and has a higher atomic percentage of oxygen than the first passivation layer, The semiconductor device further includes a second passivation layer in the trench on the passivation oxide layer, wherein the second passivation layer also includes the first dielectric material and has a lower atomic percentage of oxygen than the passivation oxide layer. |
| 申请公布号 |
US2017062496(A1) |
申请公布日期 |
2017.03.02 |
| 申请号 |
US201514837795 |
申请日期 |
2015.08.27 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Lai Chih-Yu;Chou Cheng-Hsien;Tsai Cheng-Yuan;Chiang Yen-Ting;Tu Yeur-Luen |
| 分类号 |
H01L27/146 |
主分类号 |
H01L27/146 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor device comprising:
a first passivation layer over a bottom surface and extending along sidewalls of a trench in a semiconductor substrate, wherein the first passivation layer comprises a first dielectric material; a passivation oxide layer in the trench on the first passivation layer, wherein the passivation oxide layer comprises an oxide of the first dielectric material and has a higher atomic percentage of oxygen than the first passivation layer; and a second passivation layer in the trench on the passivation oxide layer, wherein the second passivation layer comprises the first dielectric material and has a lower atomic percentage of oxygen than the passivation oxide layer. |
| 地址 |
Hsin-Chu TW |
