| 发明名称 |
METHOD FOR FORMING FUSE PAD AND BOND PAD OF INTEGRATED CIRCUIT |
| 摘要 |
The present disclosure relates to a semiconductor device. A fuse layer is arranged within a first dielectric layer. A bond pad is arranged on the first dielectric layer. A second dielectric layer is arranged along sidewall and upper surfaces of the bond pad. A passivation layer is arranged over the first and second dielectric layers, and the passivation layer having a bond pad opening overlying the bond pad and a fuse opening overlying the fuse layer. The bond pad has a bottom surface that is co-planar with a bottom surface of the passivation layer. |
| 申请公布号 |
US2017062334(A1) |
申请公布日期 |
2017.03.02 |
| 申请号 |
US201615350372 |
申请日期 |
2016.11.14 |
| 申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Yang Tai-I;Yang Chun-Yi;Lin Chih-Hao;Shue Hong-Seng;Jang Ruei-Hung |
| 分类号 |
H01L23/525;H01L23/00 |
主分类号 |
H01L23/525 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor device comprising:
a fuse layer arranged within a first dielectric layer; a bond pad arranged on the first dielectric layer; a second dielectric layer arranged along sidewall and upper surfaces of the bond pad; and a passivation layer arranged over the first and second dielectric layers, and the passivation layer having a bond pad opening overlying the bond pad and a fuse opening overlying the fuse layer; wherein the bond pad has a bottom surface that is co-planar with a bottom surface of the passivation layer. |
| 地址 |
Hsin-Chu TW |
