LOSS OF SIGNAL DETECTION ON CDR

摘要

The present invention is directed to data communication. More specifically, an embodiment of the present invention provides a technique for detecting loss of signal. An incoming data stream is sampled and a recovered clock signal is generated accordingly. An output clock signal of a higher frequency than the recovered clock signal is generated by a transmission PLL. The frequency of the recovered clock signal is compared to a divided frequency of the output clock signal. If a difference between the recovered clock signal and the output clock signal is greater than a threshold, a loss of signal indication is provided. There are other embodiments as well.

主权项

1. A SERDES device comprising:
an input terminal for processing an input data stream, the input data stream being characterized by a first data frequency; an equalizer module being configured to generate an equalizer output signal based on the input data stream; a sense amplifier being configured to sample the equalizer output signal and provide a sample data stream; a first PLL characterized by a first frequency range, the first PLL being configured to generate a recovered clock signal at a second data frequency, the first PLL being characterized by a first frequency range; a second PLL being configured to generate a transmission clock signal at a third data frequency using at least the recovered clock signal, the second PLL being characterized by a second frequency range, the second PLL being unable to lock on the recovered clock signal if the recovered clock signal is not stable, the second frequency range being smaller than the first frequency range, the third data frequency being greater than the second data frequency by a predetermined ratio, the predetermine ratio being selected to match an equivalent duty cycle interval between the first PLL and the second PLL; and a detection module comprising a frequency divider and a frequency comparator, the frequency divider being configured to divide the transmission clock signal by the predetermined ratio, the frequency comparator being configured to determine whether a difference between the divided transmission clock signal and the recovered clock signal is greater than a predetermined threshold, the detection module being configured to provide a loss of signal indication if the difference is greater than the predetermined threshold.