REGULATOR CIRCUIT AND POWER SYSTEM INCLUDING THE SAME

摘要

A regulator circuit includes a power transistor, a current minor, a first NMOS transistor, a second NMOS transistor and a current source. The power transistor has a source connected to external power supply voltage supply, a gate connected to a first node having a first voltage and a drain connected to a second node outputting an internal power supply voltage. A current minor provides a first current to a third node having a second voltage and provides a first node with a second current. A first NMOS transistor has a drain connected to a first node, a gate receiving a first reference voltage and a source connected to a fourth node. A second NMOS transistor has a drain connected to a third node, a gate connected to a second node and a source connected to the fourth node.

主权项

1. A regulator circuit comprising:
a power transistor, a source of the power transistor configured to receive an external power supply voltage, a gate of the power transistor connected to a first node and a drain of the power transistor connected to a second node, the power supply voltage configured to generate an internal power supply voltage; a current mirror configured to provide a first current to a third node, and the current mirror further configured to provide the first node with a second current, the second current having a same magnitude as the first current; a first n-channel metal-oxide semiconductor (NMOS) transistor, a drain of the first NMOS transistor connected to the first node and a source of the first NMOS transistor connected to a fourth node; a second NMOS transistor, a drain of the second NMOS transistor connected to the third node, a gate of the second NMOS transistor connected to the second node and a source of the second NMOS transistor connected to the fourth node; and a current source configured to draw a third current from the fourth node, the current source configured to generate a mirrored current having a same magnitude as the first current based on a voltage of the third node and configured to change a magnitude of the third current based on a difference between the mirrored current and a reference current.