发明名称 高速データおよび配電のための2線式通信システム
摘要 Various embodiments of the present invention provide a two-wire (e.g., unshielded twisted pair) bus system that is simple (e.g., no microcontroller required in slave devices), synchronous with embedded clock information, inexpensive, automotive EMC compliant, and has sufficient speed and bandwidth for a large number of slave devices/peripherals, and also provides various protocols that can be used in various communication systems such as a two-wire bus system. The two-wire bus optionally may be self-powered, i.e., the master device may provide power to the slave devices over the two-wire bus. Various embodiments of the present invention methods for discovery, configuration, and coordinating data communications between master and slave devices in a communication system. Exemplary embodiments are described with reference to a two-wire point-to-point bus system, although the method can be used in other communication systems. Provisions are included for controlling the sequential powering of the bus and slave devices.
申请公布号 JP6088009(B2) 申请公布日期 2017.03.01
申请号 JP20150162593 申请日期 2015.08.20
申请人 アナログ・デバイシズ・インコーポレーテッド 发明人 マーティン ケスラー
分类号 H04L12/40 主分类号 H04L12/40
代理机构 代理人
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