发明名称 FREQUENCY SYNTHESIZERS WITH ADJUSTABLE DELAYS
摘要 A radio frequency (RF) signal can be produced with an RF frequency that is responsive to a frequency reference (FREF) clock. An inductive-capacitive (LC) tank oscillator circuit can generate the RF signal. A digital to time converter (DTC) circuit can operate, for a first edge of the FREF clock, in a baseline mode that has a first delay, and for a subsequent edge of the FREF clock, in a delay mode that introduces a second delay value to the FREF clock. A controller circuit can enable the LC-tank oscillator circuit in response to a first edge of the FREF clock and to set or increase the second delay value of the delay mode as a function of the frequency of the RF signal. A phase detector circuit can detect, for the subsequent edge of the FREF clock, a phase difference between the FREF clock and the RF signal.
申请公布号 EP3136604(A1) 申请公布日期 2017.03.01
申请号 EP20160184917 申请日期 2016.08.19
申请人 NXP B.V. 发明人 Leong, Frank;Staszewski, Robert Bogdan;Gao, Yuan
分类号 H03L7/099;H03L7/18 主分类号 H03L7/099
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