Evaluating on-chip voltage regulation

摘要

A linear circuit simulator can be supplied with a linear power distribution model of an integrated circuit (IC) and two sets of voltage regulator equivalent resistances. The linear circuit simulator can then be used to calculate two voltages, at a sense point of the IC, corresponding to the two sets of voltage regulator equivalent resistances. The two sets of voltage regulator equivalent resistances and the two voltages at the IC sense point can be used to interpolate a slope of a resistance versus voltage curve of the linear power distribution model. The slope can be used to calculate an updated set of voltage regulator equivalent resistances, which can be used by the linear circuit simulator to calculate a set of performance metrics and an updated voltage at the sense point of the IC.

主权项

1. A method, implemented on the at least one processor circuit, the method comprising:
supplying, to a linear circuit simulator running on the at least one processor circuit, a linear power distribution model of an integrated circuit (IC) and a first set of voltage regulator equivalent resistances; calculating, with the linear circuit simulator running on the at least one processor circuit, a first DC steady-state voltage at a sense point of the IC, the first DC steady-state voltage corresponding to the first set of voltage regulator equivalent resistances; supplying, to the linear circuit simulator running on the at least one processor circuit, a second set of voltage regulator equivalent resistances; calculating, with the linear circuit simulator running on the at least one processor circuit, a DC steady-state voltage at the sense point of the IC, the second DC steady-state voltage corresponding to the second set of voltage regulator equivalent resistances; interpolating, with the at least one processor circuit, using the first set and the second set of voltage regulator equivalent resistances and the first and second DC steady-state voltages at the sense point of the IC, a slope of a resistance versus voltage curve of the linear power distribution model; calculating, with the at least one processor circuit, using the slope of the resistance versus voltage curve, an updated set of voltage regulator equivalent resistances, the updated set of voltage regulator equivalent resistances corresponding to a target DC steady-state voltage at the sense point of the IC; and calculating, with the linear circuit simulator running on the at least one processor circuit, the linear circuit simulator supplied with the updated set of voltage regulator equivalent resistances, a set of performance metrics and an updated DC steady-state voltage at the sense point of the IC; and generating, with the at least one processor circuit, a voltage gradient plot displaying a plurality of DC steady-state voltages corresponding to a plurality of sense points on the IC, the plot including at least the updated DC steady state voltage at the sense point of the IC.