| 发明名称 | Timing generator for generating high resolution pulses having arbitrary widths | ||
| 摘要 | An exemplary timing generator includes a coarse delay circuit configured to generate a coarse delayed rising edge signal and a coarse delayed falling edge signal from a reference timing signal; a fine delay circuit configured to generate a fine delayed rising edge signal from the coarse delayed rising edge signal and a fine delayed falling edge signal from the coarse delayed falling edge signal; an edge combiner configured to generate the timing signal based on the fine delayed rising edge signal and the fine delayed falling edge signal; and a masking circuit configured to generate a rising edge masking signal and a falling edge masking signal for controlling when the rising edges and the falling edges of the timing signal are generated. | ||
| 申请公布号 | US9584105(B1) | 申请公布日期 | 2017.02.28 |
| 申请号 | US201615066182 | 申请日期 | 2016.03.10 |
| 申请人 | ANALOG DEVICES, INC. | 发明人 | Foley David P. |
| 分类号 | H03L7/06;H03K5/13;H03L7/08;H03K5/00 | 主分类号 | H03L7/06 |
| 代理机构 | Patent Capital Group | 代理人 | Patent Capital Group |
| 主权项 | 1. A timing generator for generating a timing signal, the timing generator comprising: a coarse delay circuit configured to generate a coarse delayed rising edge signal and a coarse delayed falling edge signal from a reference timing signal; a fine delay circuit configured to generate a fine delayed rising edge signal from the coarse delayed rising edge signal and a fine delayed falling edge signal from the coarse delayed falling edge signal; an edge combiner configured to generate the timing signal based on the fine delayed rising edge signal and the fine delayed falling edge signal; and a masking circuit configured to generate a rising edge masking signal and a falling edge masking signal for controlling when the rising edges and the falling edges of the timing signal are generated. | ||
| 地址 | Norwood MA US | ||