Display driving circuit for eliminating delay errors among display driving signals, driving method thereof and display apparatus

摘要

Provided are a display driving circuit, a driving method thereof and a display apparatus. The display driving circuit comprises a timing sequence control unit (20) and at least one signal driving unit (30) connected to the timing sequence control unit (20). The timing sequence control unit (20) comprises a receiving module (201), a processing module (202) and a sending module (203). The receiving module (201) receives feedback signals (FB) outputted from respective signal driving units (30) to the timing sequence control unit (20); the processing module (202) obtains a maximum delay time after comparing signal delay time of the signal driving units (30) according to the feedback signals (FB); the sending module (203) sends a second clock signal (CLK2) to respective signal driving units (30) according to the maximum delay time such that respective signal driving units (30) receive the second clock signal (CLK2) simultaneously. Therefore, delay errors of the display driving signals can be eliminated, and distortion of the display image can be avoided.

主权项

1. A display driving circuit comprising a timing sequence control unit and at least one signal driving unit connected to the timing sequence control unit, wherein the timing sequence control unit is configured to send first clock signals to respective signal driving units and comprises:
a receiving module connected to the respective signal driving units and configured to receive feedback signals outputted from the respective signal driving units to the timing sequence control unit after the respective signal driving units receive the first clock signals respectively; a processing module configured to obtain a signal delay time of the respective signal driving units according to the feedback signals and to obtain a maximum delay time according to the signal delay time of the respective signal driving units; a sending module configured to send a second clock signal to the respective signal driving units according to the maximum delay time such that respective signal driving units receive the second clock signal simultaneously.