Microelectronic package with stacked microelectronic units and method for manufacture thereof

摘要

A microelectronic package may include a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts. The package may include a second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, and an encapsulant contacting an edge of the chip of the second unit and having a surface extending away from the edge. The surfaces of the chip and the encapsulant of the second unit define a face of the second unit. Package terminals at the face may be electrically connected with the first unit contacts through bond wires electrically connected with the first unit contacts, and the second chip contacts through metallized vias and traces formed in contact with the second chip contacts.

主权项

1. A microelectronic package comprising:
a first microelectronic unit including a first semiconductor chip having first chip contacts, an encapsulant contacting an edge of the first semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically coupled with the first chip contacts; a second microelectronic unit including a second semiconductor chip having a front surface and an edge extending away from the front surface, and second chip contacts at the front surface, an encapsulant contacting the edge of the second semiconductor chip and having a planar surface extending away from the edge, the front surface of the semiconductor chip and the planar surface of the encapsulant of the second microelectronic unit defining a face of the second microelectronic unit, wherein the first and second microelectronic units are stacked such that the face of the second microelectronic unit faces away from the first microelectronic unit; and package terminals at the planar surface of the second microelectronic unit electrically coupled with (i) the first unit contacts through first electrically conductive structure extending above the planar surface of the second microelectronic unit and laterally relative to the package terminals, and with (ii) the second chip contacts through second electrically conductive structure coupled with the second chip contacts.