发明名称 Non-volatile semiconductor memory device and memory system in which write operation is resumed after being suspended for an interrupt operation
摘要 A non-volatile semiconductor memory device includes a memory cell array and a control circuit. A control circuit performs an erase operation providing a memory cell with a first threshold voltage level for erasing data of a memory cell, and then perform a plurality of first write operations providing a memory cell with a second threshold voltage level, the second threshold voltage level being higher than the first threshold voltage level and being positive level. When the control circuit receives a first execution instruction from outside during the first write operations, the first execution instruction being for performing first function operation except for the erase operation and the first write operations, the circuit performs the first function operation during the first write operations.
申请公布号 US9583200(B2) 申请公布日期 2017.02.28
申请号 US201615074190 申请日期 2016.03.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Nagadomi Yasushi
分类号 G11C16/04;G11C16/14;G11C11/56;G11C16/06;G11C16/10 主分类号 G11C16/04
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A memory system comprising: a controller chip; and a memory chip configured to receive a plurality of commands from the controller chip; the memory chip comprising a first memory cell; a second memory cell; and a control circuit configured to apply a write voltage to a gate of the first memory cell when the memory chip receives an instruction of executing a write operation, suspend the write operation when the memory chip receives a suspend command, and resume the write operation when; the memory chip receives a resume command after the control circuit suspends the write operation, the memory chip being configured to output a first signal and a second signal to the controller chip when the memory chip receives a status command after the control circuit suspends the write operation and before the memory chip resumes the write operation, the first signal and the second signal indicating whether the write operation is completed or not and that the write operation is suspended.
地址 Minato-ku JP