发明名称 METHOD OF PROVIDING A PATH DELAY ASYMMETRY FOR TIME SYNCHRONIZATION BETWEEN A MASTER AND A SLAVE CLOCK ACROSS A COMMUNCIATION NETWORK
摘要 A method 10 of providing a path delay asymmetry for time synchronization between a master clock at a first client node and a slave clock at a second client node across a server communications network. The method comprises: mapping a first time protocol signal (TPS) carrying master clock time protocol data onto a first transmission signal, determining a forward mapping delay, dmf, and providing dmf to a path delay asymmetry calculation element 12; mapping a second TPS carrying slave clock time protocol data onto a second transmission signal, determining a reverse mapping delay, dmr, and providing the dmr to the patch delay asymmetry calculation element 14; applying FEC to the first transmission signal, determining a forward FEC delay, dfecf, and providing the dfecf to the path delay asymmetry calculation element 16; applying FEC to the second transmission signal, determining a reverse FEC delay, dfecr, and providing dfecr to the path delay asymmetry calculation element 18; calculating a path delay asymmetry in dependence on dmf, dmr, dfecf and dfecr 20; and providing the path delay asymmetry to a time protocol client at the second client node 22.
申请公布号 PL2676389(T3) 申请公布日期 2017.02.28
申请号 PL11716547T 申请日期 2011.04.27
申请人 Telefonaktiebolaget LM Ericsson (publ) 发明人 RUFFINI STEFANO;BOTTARI GIULIO
分类号 H04J3/06;H04L1/00 主分类号 H04J3/06
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