Delay line circuit

摘要

A delay line circuit includes a plurality of delay units configured to receive an input signal and to provide a first output signal. The plurality of delay units is configured to selectively invert or relay the input signal to produce the first output signal based on a first instruction received from a delay line controller. A phase interpolator unit includes an offset unit configured to selectively add a speed control unit in the phase interpolator unit based on a second instruction received from the delay line controller. The phase interpolator unit is further configured to receive the first output signal and provide a second output signal.

主权项

1. A delay line circuit comprising:
a plurality of delay units configured to receive an input signal, to selectively invert or relay the input signal, and to produce a first output signal based on a first instruction received from a delay line controller; and a phase interpolator unit configured to selectively add a speed control unit in the phase interpolator unit based on a second instruction received from the delay line controller, wherein the phase interpolator unit is further configured to receive the first output signal and provide a second output signal, and wherein the speed control unit is configured to adjust a phase of the second output signal.