| 发明名称 | All digital phase-locked loop | ||
| 摘要 | A circuit and a method are disclosed herein. The circuit includes a digitally controlled oscillator and a detector. The digitally controlled oscillator is configured to generate an oscillator signal according to an oscillator tuning word. The detector is configured to output one of a first control word and a second control word that is derived from the first control word as the oscillator tuning word. | ||
| 申请公布号 | US9584141(B2) | 申请公布日期 | 2017.02.28 |
| 申请号 | US201614990583 | 申请日期 | 2016.01.07 |
| 申请人 | TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. | 发明人 | Kuo Feng-Wei;Jou Chewn-Pu;Chen Huan-Neng;Yen Kuang-Kai;Cho Lan-Chou;Staszewski Robert Bogdan;Lee Tsung-Hsiung |
| 分类号 | H03L7/085;H03L7/099;H03L7/18;H03L7/00 | 主分类号 | H03L7/085 |
| 代理机构 | Maschoff Brennan | 代理人 | Maschoff Brennan |
| 主权项 | 1. A circuit comprising: a digitally controlled oscillator configured to generate an oscillator signal according to an oscillator tuning word; and a detector configured to output one of a first control word and a second control word that is derived from the first control word, as the oscillator tuning word, wherein the detector is further configured to latch the first control word and to output the latched first control word as the second control word in response to a start signal, and the output of the latched first control word is provided to the digitally controlled oscillator. | ||
| 地址 | Hsinchu TW | ||