Adjacent strained <100> NFET fins and <110> PFET fins

摘要

The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of forming strained <100> n-channel field effect transistor (NFET) fins and adjacent strained <110> p-channel field effect transistor (PFET) fins on the same substrate. A <110> crystalline oxide layer may be either bonded or epitaxially grown on a substrate layer. A first SOI layer with a <100> crystallographic orientation and tensile strain may be bonded to the crystalline oxide layer. A second SOI layer with a <110> crystallographic orientation and compressive strain may be epitaxially grown on the crystalline oxide layer. The first SOI layer may be used to form the fins of a NFET device. The second SOI layer may be used to form the fins of a PFET device.

主权项

1. A method comprising:
forming a crystalline oxide layer on an upper surface of a substrate, the crystalline oxide layer comprising a oxide material having a crystallographic orientation <110>; forming a first silicon on insulator (SOI) layer on an upper surface of the crystalline oxide layer, the first SOI layer comprising a semiconductor material having a crystallographic orientation <100>; removing a portion of the first SOI layer to form an opening, the opening exposing the upper surface of the crystalline oxide layer and creating a first remaining portion of the first SOI layer and a second remaining portion of the first SOI layer; forming a shallow trench isolation (STI) layer on the opening, the STI layer adjacent to a sidewall of the first remaining portion of the first SOI layer and adjacent to a sidewall of the second remaining portion of the first SOI layer; forming a hardmask on an upper surface of the first remaining portion of the first SOI layer; removing the second remaining portion of the first SOI layer exposing the upper surface of the crystalline oxide layer; forming a second silicon on insulator (SOI) layer on the exposed upper surface of the crystalline oxide layer adjacent to a sidewall of the shallow trench isolation, the second SOI layer comprising a semiconductor material having a crystallographic orientation <110>; and removing the hardmask; forming <100> fins in the first SOI layer; and forming <110> fins in the second SOI layer.