发明名称 REFERENCE CLOCK SIGNAL GENERATORS AND METHODS FOR GENERATING A REFERENCE CLOCK SIGNAL
摘要 According to various embodiments, there is provided a method for generating a reference clock signal, the method including discharging a capacitive element to a discharged state, when a reset signal has a predetermined reset state; charging the capacitive element from the discharged state to a first voltage, when a charge signal has a predetermined charge state; comparing the first voltage to a zero voltage, when a compare signal has a predetermined compare state; generating a second voltage based on the comparing of the first voltage to the zero voltage; generating a clock signal based on the second voltage, using an oscillator; and generating each of the reset signal, the charge signal and the compare signal, based on the clock signal.
申请公布号 SG11201700578W(A) 申请公布日期 2017.02.27
申请号 SG11201700578W 申请日期 2015.09.07
申请人 AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH 发明人 LEE, JUNGHYUP;JE, MINKYU
分类号 H03L1/00;H03B5/02;H03B5/04;H03L7/06 主分类号 H03L1/00
代理机构 代理人
主权项
地址