MANAGING CACHE COHERENCE FOR MEMORY CACHES

摘要

A computer system has a plurality of processors with non-blocking memory caches. A controller sets an upper limit of allowed snoop commands for the computer system. The controller adjusts, using real-time bandwidth data of the computing system, the limit of snoop commands to a new numerical value. The controller detects that the snoop limit is being adjusted between snoop rates more than a threshold number of times. The controller designates an overriding limit of snoop commands in response to detecting the snoop limit being adjusted more than the threshold number of times. The overriding limit of snoop commands is fixed for a period of time. The controller delays snoop commands which exceed the overriding limit of snoop commands during the period of time.

主权项

1. A method for managing cache coherence for a non-blocking memory cache in a computing system, the method comprising:
setting a limit of snoop commands for the non-blocking memory cache to a numerical value; adjusting, using real-time bandwidth data of the computing system, the limit of snoop commands to a new numerical value; detecting the limit of snoop commands being adjusted more than a threshold number of times; in response to detecting the limit of snoop commands being adjusted more than the threshold number of times, designating a first overriding limit of snoop commands for the non-blocking memory cache, wherein the first overriding limit of snoop commands is fixed for a first period of time; and delaying, for the first period of time, snoop commands for the non-blocking memory cache which exceed the first overriding limit of snoop commands.