SHARED PHYSICAL REGISTERS AND MAPPING TABLE FOR ARCHITECTURAL REGISTERS OF MULTIPLE THREADS

摘要

A system for handling a register accessing request, comprising includes an interface for receiving register accessing requests and a processing unit connected to the interface. The processing unit dynamically maps architectural registers to physical registers based on a criterion such as recent usage and/or access frequency of the architectural registers by multithreading (MT) threads. The processing unit also looks up a respective architectural register for register accessing requests for which a match is not found in the physical registers.