| 主权项 |
1. A system for customizing a wafer carrier for a chemical vapor deposition (CVD) system, wherein the wafer carrier has a wafer carrier body formed symmetrically about a central axis, a generally planar top surface that is situated perpendicularly to the central axis, and at least one wafer retention pocket recessed in the wafer carrier body from the top surface, each of the at least one wafer retention pocket including a floor surface and a peripheral wall surface that surrounds the floor surface and defines a periphery of that wafer retention pocket, the system comprising:
a computing platform including computing hardware having at least one processor, at least one data storage device, and input/output facilities, the at least one data storage device containing instructions that, when executed on the computing platform, cause the computing platform to implement:
a thermal model generator engine that reads process parameters defining (a) physical and operational characteristics of the CVD system including the wafer carrier, and (b) a process recipe to be carried out on the CVD system, and that produces a thermal model, based on the physical and operational characteristics, that is a representation of a virtual CVD system;a thermal model simulator engine that computationally simulates operation of the thermal model carrying out at least a portion of the process recipe, including modeling of heat transfer taking place in the virtual CVD system, the thermal model simulator engine producing a set of thermal-spatial non-uniformities in at least one region of interest of at least one wafer retention pocket of a virtual wafer carrier modeled as part of the thermal model, at one or more stages of the process recipe;a pocket floor correction engine that computationally generates a representation of structural corrections to the pocket floor of each of the at least one wafer retention pocket of the wafer carrier modeled as part of the thermal model, the structural corrections being based on the set of thermal-spatial non-uniformities and on a predefined thermal-pocket floor relation that defines at least one design rule for correcting the pocket floor to achieve an increase in thermal uniformity throughout the at least one region of interest. a contouring apparatus configured to mechanically form, on the wafer carrier body, physical structural corrections corresponding to the representation of structural corrections, such that the wafer carrier is optimized to the thermal model. |
