发明名称 Maintenance Operations in a DRAM
摘要 A system includes a memory controller and a memory device having a command interface and a plurality of memory banks, each with a plurality of rows of memory cells. The memory controller transmits an auto-refresh command to the memory device. Responsive to the auto-refresh command, during a first time interval, the memory device performs refresh operations to refresh the memory cells and the command interface of the memory device is placed into a calibration mode for the duration of the first time interval. Concurrently, during at least a portion of the first time interval, the memory controller performs a calibration of the command interface of the memory device. The auto-refresh command may specify an order in which memory banks of the memory device are to be refreshed, such that the memory device sequentially refreshes a respective row in the plurality of memory banks in the specified bank order.
申请公布号 US2017052722(A1) 申请公布日期 2017.02.23
申请号 US201615253736 申请日期 2016.08.31
申请人 Rambus Inc. 发明人 Ware Frederick A.;Palmer Robert E.;Poulton John W.
分类号 G06F3/06;G11C11/406 主分类号 G06F3/06
代理机构 代理人
主权项 1. A method of operating a memory controller that controls the operation of a memory device, the memory device including a command interface and a plurality of memory banks, each bank including a plurality of rows of memory cells, the method comprising: the memory controller transmitting a refresh command, along with a plurality of bits, to the command interface of the memory device, wherein responsive to the refresh command, during a first time interval, the memory device performs a refresh operation to refresh data stored in at least one bank of the plurality of memory banks, the plurality of bits to identify at least one bank as a first bank of the plurality of banks to be refreshed in a sequence; and transmitting an operation code from the memory controller to the memory device, the operation code specifying a calibration operation of the command interface; wherein, after receiving the operation code, the memory device is to perform the calibration operation of the command interface of the memory device while performing the refresh operation to the at least one bank identified by the plurality of bits.
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