| 发明名称 |
SEMICONDUCTOR CHIP, TEST SYSTEM, AND METHOD OF TESTING THE SEMICONDUCTOR CHIP |
| 摘要 |
A semiconductor chip, a test system, and a method of testing the semiconductor chip. The semiconductor chip includes a pulse generator configured to generate a test pulse in response to a test request; a logic chain comprising a plurality of logic devices serially connected to each other and transferring the test pulse sequentially; and a detector configured to detect a logic level of an output signal of each of the logic devices and output a detection result indicating a degree of an inter-symbol interference (ISI). |
| 申请公布号 |
US2017052225(A1) |
申请公布日期 |
2017.02.23 |
| 申请号 |
US201615170940 |
申请日期 |
2016.06.01 |
| 申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
LEE Seon-kyoo;IHM Jeong-don;JEONG Byung-hoon;KANG Dae-woon;LEE Tae-sung;KIM Sang-lok |
| 分类号 |
G01R31/3177;G01R31/317 |
主分类号 |
G01R31/3177 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a pulse generator configured to generate a test pulse in response to a test request; a logic chain comprising a plurality of logic devices serially connected to each other and transferring the test pulse sequentially; and a detector configured to detect a logic level of an output signal of each of the logic devices and output a detection result indicating a degree of an inter-symbol interference (ISI). |
| 地址 |
Suwon-si KR |
