发明名称 |
SEMICONDUCTOR DEVICE |
摘要 |
The semiconductor device includes a trench that penetrates a barrier layer, and reaches a middle portion of a channel layer among an n+ layer, an n-type layer, a p-type layer, the channel layer, and the barrier layer which are formed above a substrate, a gate electrode arranged within the groove through a gate insulating film, and a source electrode and a drain electrode which are formed above the barrier layer on both sides of the gate electrode. The n-type layer and the drain electrode are electrically coupled by a connection portion that reaches the n+ layer. The p-type layer and the source electrode are electrically coupled by a connection portion that reaches the p-type layer. A diode including a p-type layer and an n-type layer is provided between the source electrode and the drain electrode, to thereby prevent the breaking of an element caused by an avalanche breakdown. |
申请公布号 |
US2017054014(A1) |
申请公布日期 |
2017.02.23 |
申请号 |
US201615345880 |
申请日期 |
2016.11.08 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Nakayama Tatsuo;Miyamoto Hironobu;Okamoto Yasuhiro;Miura Yoshinao;Inoue Takashi |
分类号 |
H01L29/778;H01L27/06;H01L29/06;H01L29/20;H01L29/15;H01L23/522 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device, comprising:
a first nitride semiconductor layer that is made over a substrate; a second nitride semiconductor layer that is formed on the first nitride semiconductor layer; a third nitride semiconductor layer that is formed on the second nitride semiconductor layer; a fourth nitride semiconductor layer that is formed on the third nitride semiconductor layer; a gate electrode that is formed over the fourth nitride semiconductor layer; a first electrode and a second electrode that are formed above the fourth nitride semiconductor layer on respective sides of the gate electrode; a first connection portion that connects the first electrode to the first nitride semiconductor layer; a second connection portion that connects the second electrode to the second nitride semiconductor layer; and an insulating film that is formed between the first connection portion and the second nitride semiconductor layer, wherein the first nitride semiconductor layer contains impurities of a first conductivity type, wherein the second nitride semiconductor layer contains impurities of a second conductivity type that is a conductivity type opposite to the first conductivity type, wherein the substrate has a first region and a second region, wherein the gate electrode, the first electrode, and the second electrode are formed in the first region, wherein the second region is a device isolation region formed in the fourth nitride semiconductor layer and the third nitride semiconductor layer, wherein the first connection portion is arranged within a first through-hole that penetrates through the device isolation region and the second nitride semiconductor layer, and reaches the first nitride semiconductor layer, and wherein the insulating film is arranged between a side wall of the first through-hole and the first connection portion, wherein the first electrode extends along a first direction and the first electrode is connected to a first pad extending along a second direction that is perpendicular to the first direction in a plan view. |
地址 |
Tokyo JP |