Thin film transistor array panel and conducting structure

摘要

A conductive layer for a thin film transistor (TFT) array panel includes a multi-layered portion defining a source electrode and a drain electrode of a TFT device, and includes a first sub-layer, a second sub-layer, a third sub-layer, and at least one additional sub-layer. The third and the first sub-layers include indium and zinc oxide materials. An indium to zinc content ratio in the first sub-layer is greater than that in the third sub-layer. An indium to zinc content ratio in the additional sub-layer is formulated between that in the first and the third sub-layers. The content ratio differentiation between the first and the third sub-layers affects a lateral etch profile associated with a gap generated in the second conductive layer between the source and the drain electrodes, where the associated gap width in the third sub-layer is wider than that that in the first sub-layer.

主权项

1. A thin film transistor array panel, comprising:
a first conductive layer including a gate electrode; a channel layer disposed over the gate electrode and insulated there-from; and a second conductive layer disposed over the channel layer, the second conductive layer comprising a multi-layered portion defining a source electrode and a drain electrode, wherein the multi-layered portion of the second conductive layer comprises
a first sub-layer arranged in electrical contact with the channel layer,a second sub-layer disposed over the first sub-layer,a third sub-layer disposed over the second sub-layer, andat least one additional sub-layer disposed between the first sub-layer and the second sub-layer, wherein each of the first, the third, and the additional sub-layers comprises a metal oxide material containing indium and zinc, wherein an indium to zinc content ratio in the first sub-layer is greater than an indium to zinc content ratio in the third sub-layer, wherein an indium to zinc content ratio in the additional sub-layer is formulated between that in the first and third sub-layers, wherein the indium to zinc content ratio differentiation between the first and the third sub-layers affects a lateral etch profile associated with a gap generated in the second conductive layer between the source and the drain electrodes, and wherein a gap width associated there-with in the third sub-layer is wider than that that in the first sub-layer.